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9 Open 8 Closed
9 Open 8 Closed
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Issues list

Fifo reading might stuck depending on AHB bug Something isn't working
#27 opened Oct 9, 2024 by M0stafaRady
@shalan
Documentation incomplete
#25 opened Aug 20, 2024 by marwaneltoukhy
WB wrapper synthesis issue
#24 opened Aug 20, 2024 by marwaneltoukhy
unit tests fail
#23 opened Aug 20, 2024 by marwaneltoukhy
there are 2 files for each bus wrapper
#22 opened Aug 20, 2024 by marwaneltoukhy
Missing modules that start with aucohl
#21 opened Aug 20, 2024 by marwaneltoukhy
Ensure consistency of IP Utilities modules and macros usage in all IPs
#20 opened Jun 15, 2024 by NouranAbdelaziz
unmapped cells in synthesis
#19 opened May 2, 2024 by M0stafaRady
@shalan
1
Enhancing UART Transmission Integrity: Suggestions for Mid-Transmission Disruptions enhancement New feature or request
#6 opened Jan 16, 2024 by M0stafaRady
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