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include clock gate sky 130 cell inside ifdef block for fpga implmenta… #96

include clock gate sky 130 cell inside ifdef block for fpga implmenta…

include clock gate sky 130 cell inside ifdef block for fpga implmenta… #96

Triggered via push September 17, 2024 07:02
Status Failure
Total duration 42s
Artifacts 1

uvm_ci.yaml

on: push
Extract-Buses
4s
Extract-Buses
Run-IP-Tests  /  Setup-Work-Space
7s
Run-IP-Tests / Setup-Work-Space
Run-IP-Tests  /  Prepare-Tests-Matrix
3s
Run-IP-Tests / Prepare-Tests-Matrix
Matrix: Run-IP-Tests / Run-IP
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1 error
Run-IP-Tests / Prepare-Tests-Matrix
Process completed with exit code 2.

Artifacts

Produced during runtime
Name Size
❲workspace❳-❲EF_UART❳
819 KB