remove enableSIMD which was not used

Signed-off-by: Alexandre Eichenberger <[email protected]>
onnx · Feb 12, 2025 · 5357258 · 5357258
1 parent 3a1b1a0
commit 5357258
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Showing 6 changed files with 16 additions and 22 deletions.
diff --git a/src/Accelerators/NNPA/Compiler/NNPACompilerUtils.cpp b/src/Accelerators/NNPA/Compiler/NNPACompilerUtils.cpp
@@ -277,7 +277,7 @@ void addPassesNNPA(mlir::OwningOpRef<mlir::ModuleOp> &module,
         emissionTarget = EmitMLIR;
       else {
         // Partially lower Krnl ops to Affine dialect.
-        addKrnlToAffinePasses(pm, optLevel);
+        addKrnlToAffinePasses(pm);
         // Optimizations at ZLow that needs affine map in MemRef.
         pm.addPass(zlow::createZLowRewritePass());
         // Late generation of code for stick/unstick, needed to be after a
@@ -289,7 +289,7 @@ void addPassesNNPA(mlir::OwningOpRef<mlir::ModuleOp> &module,
         normalizeMemRefsPasses(pm);
         // Some Krnl ops, e.g. KrnlMemset, potentially exist and will be lowered
         // to Affine when its operands are normalized.
-        addKrnlToAffinePasses(pm, optLevel);
+        addKrnlToAffinePasses(pm);
         // Optimizations at ZLow after normalizing MemRefs.
         pm.addPass(zlow::createZLowRewritePass());
         // The createZLowStickExpansion pass may create parallel constructs,

diff --git a/src/Compiler/CompilerPasses.cpp b/src/Compiler/CompilerPasses.cpp
@@ -212,9 +212,9 @@ void addONNXToKrnlPasses(mlir::PassManager &pm, int optLevel, bool enableCSE,
   pm.addPass(mlir::createCanonicalizerPass());
 }
 
-void addKrnlToAffinePasses(mlir::PassManager &pm, int optLevel) {
+void addKrnlToAffinePasses(mlir::PassManager &pm) {
   pm.addNestedPass<func::FuncOp>(onnx_mlir::krnl::createConvertKrnlToAffinePass(
-      /*enableSIMD*/ optLevel >= 3 && !disableSimdOption, enableParallel));
+      enableParallel));
 }
 
 void addKrnlToLLVMPasses(
@@ -328,7 +328,7 @@ void addPasses(mlir::OwningOpRef<ModuleOp> &module, mlir::PassManager &pm,
       addONNXToKrnlPasses(pm, OptimizationLevel, /*enableCSE*/ true,
           instrumentSignatures, ONNXOpStats);
     if (inputIRLevel <= MLIRLevel)
-      addKrnlToAffinePasses(pm, OptimizationLevel);
+      addKrnlToAffinePasses(pm);
   }
 
   if (inputIRLevel <= LLVMLevel && emissionTarget >= EmitLLVMIR)

diff --git a/src/Compiler/CompilerPasses.hpp b/src/Compiler/CompilerPasses.hpp
@@ -24,7 +24,7 @@ void addONNXToMLIRPasses(mlir::PassManager &pm, bool targetCPU,
     bool donotScrubDisposableElementsAttr = false);
 void addONNXToKrnlPasses(mlir::PassManager &pm, int optLevel, bool enableCSE,
     std::string instrumentSignatureString, std::string ONNXOpsStatFilename);
-void addKrnlToAffinePasses(mlir::PassManager &pm, int optLevel);
+void addKrnlToAffinePasses(mlir::PassManager &pm);
 void addKrnlToLLVMPasses(
     mlir::OpPassManager &pm, std::string outputNameNoExt, bool enableCSE);
 InputIRLevelType determineInputIRLevel(

diff --git a/src/Conversion/KrnlToAffine/ConvertKrnlToAffine.cpp b/src/Conversion/KrnlToAffine/ConvertKrnlToAffine.cpp
@@ -847,9 +847,8 @@ struct ConvertKrnlToAffinePass
   ConvertKrnlToAffinePass() = default;
   ConvertKrnlToAffinePass(const ConvertKrnlToAffinePass &pass)
       : PassWrapper<ConvertKrnlToAffinePass, OperationPass<func::FuncOp>>() {}
-  ConvertKrnlToAffinePass(bool enableSIMD, bool enableParallel) {
-    this->enableSIMD = enableSIMD;
-    this->enableParallel = enableParallel;
+  ConvertKrnlToAffinePass(bool parallelEnabled) {
+    this->parallelEnabled = parallelEnabled;
   }
 
   StringRef getArgument() const override { return "convert-krnl-to-affine"; }
@@ -858,9 +857,7 @@ struct ConvertKrnlToAffinePass
 
   void runOnOperation() final;
 
-  Option<bool> enableSIMD{*this, "enable-simd",
-      llvm::cl::desc("Enable SIMD code gen"), llvm::cl::init(false)};
-  Option<bool> enableParallel{*this, "enable-parallel",
+  Option<bool> parallelEnabled{*this, "parallel-enabled",
       llvm::cl::desc("Enable parallelization"), llvm::cl::init(false)};
 };
 
@@ -1021,8 +1018,7 @@ void ConvertKrnlToAffinePass::runOnOperation() {
   RewritePatternSet patterns(ctx);
   AffineTypeConverter typeConverter;
 
-  populateKrnlToAffineConversion(
-      typeConverter, patterns, ctx, enableSIMD, enableParallel);
+  populateKrnlToAffineConversion(typeConverter, patterns, ctx, parallelEnabled);
 
   // Create list for recording the <loop, unroll factor> pairs associated with
   // this function.
@@ -1060,14 +1056,12 @@ std::unique_ptr<Pass> createConvertKrnlToAffinePass() {
   return std::make_unique<ConvertKrnlToAffinePass>();
 }
 
-std::unique_ptr<Pass> createConvertKrnlToAffinePass(
-    bool enableSIMD, bool enableParallel) {
-  return std::make_unique<ConvertKrnlToAffinePass>(enableSIMD, enableParallel);
+std::unique_ptr<Pass> createConvertKrnlToAffinePass(bool parallelEnabled) {
+  return std::make_unique<ConvertKrnlToAffinePass>(parallelEnabled);
 }
 
 void populateKrnlToAffineConversion(TypeConverter &typeConverter,
-    RewritePatternSet &patterns, MLIRContext *ctx, bool enableSIMD,
-    bool enableParallel) {
+    RewritePatternSet &patterns, MLIRContext *ctx, bool parallelEnabled) {
   krnl::populateLoweringKrnlCopyFromBufferOpPattern(
       typeConverter, patterns, ctx);
   krnl::populateLoweringKrnlCopyToBufferOpPattern(typeConverter, patterns, ctx);
@@ -1076,7 +1070,7 @@ void populateKrnlToAffineConversion(TypeConverter &typeConverter,
   krnl::populateLoweringKrnlGetLinearOffsetIndexOpPattern(
       typeConverter, patterns, ctx);
   krnl::populateLoweringKrnlMatmultOpPattern(
-      typeConverter, patterns, ctx, enableParallel);
+      typeConverter, patterns, ctx, parallelEnabled);
   krnl::populateLoweringKrnlMemsetOpPattern(typeConverter, patterns, ctx);
   krnl::populateLoweringKrnlPrefetchOpPattern(typeConverter, patterns, ctx);
   krnl::populateLoweringKrnlTerminatorOpPattern(typeConverter, patterns, ctx);

diff --git a/src/Conversion/KrnlToAffine/ConvertKrnlToAffine.hpp b/src/Conversion/KrnlToAffine/ConvertKrnlToAffine.hpp
@@ -56,7 +56,7 @@ using UnrollAndJamList = llvm::SmallVector<UnrollAndJamRecord, 4>;
 using UnrollAndJamMap = std::map<mlir::Operation *, UnrollAndJamList *>;
 
 void populateKrnlToAffineConversion(mlir::TypeConverter &typeConverter,
-    mlir::RewritePatternSet &patterns, mlir::MLIRContext *ctx, bool enableSIMD,
+    mlir::RewritePatternSet &patterns, mlir::MLIRContext *ctx,
     bool enableParallel);
 
 void populateLoweringKrnlCopyFromBufferOpPattern(

diff --git a/src/Pass/Passes.hpp b/src/Pass/Passes.hpp
@@ -109,7 +109,7 @@ namespace krnl {
 /// Pass for lowering frontend dialects to Krnl IR dialect.
 std::unique_ptr<mlir::Pass> createConvertKrnlToAffinePass();
 std::unique_ptr<mlir::Pass> createConvertKrnlToAffinePass(
-    bool enableSIMD, bool enableParallel);
+    bool parallelEnabled);
 
 /// Pass for lowering Seq in Krnl dialect.
 std::unique_ptr<mlir::Pass> createConvertSeqToMemrefPass();