Fix DivMod conversion.

angr · Dec 11, 2024 · a61add9 · a61add9
1 parent 4102d70
commit a61add9
Showing 1 changed file with 41 additions and 3 deletions.
diff --git a/ailment/converter_vex.py b/ailment/converter_vex.py
@@ -288,6 +288,23 @@ def Binop(expr, manager):
         bits = op._output_size_bits
 
         if op_name == "DivMod":
+            op1_size = op._from_size if op._from_size is not None else operands[0].bits
+            op2_size = op._to_size if op._to_size is not None else operands[1].bits
+
+            if op2_size < op1_size:
+                # e.g., DivModU64to32
+                operands[1] = Convert(
+                    manager.next_atom(),
+                    op2_size,
+                    op1_size,
+                    False if op._from_signed == "U" else True,
+                    operands[1],
+                    ins_addr=manager.ins_addr,
+                    vex_block_addr=manager.block_addr,
+                    vex_stmt_idx=manager.vex_stmt_idx,
+                )
+            chunk_bits = bits // 2
+
             div = BinaryOp(
                 manager.next_atom(),
                 "Div",
@@ -296,7 +313,17 @@ def Binop(expr, manager):
                 ins_addr=manager.ins_addr,
                 vex_block_addr=manager.block_addr,
                 vex_stmt_idx=manager.vex_stmt_idx,
-                bits=bits,
+                bits=op1_size,
+            )
+            truncated_div = Convert(
+                manager.next_atom(),
+                op1_size,
+                chunk_bits,
+                signed,
+                div,
+                ins_addr=manager.ins_addr,
+                vex_block_addr=manager.block_addr,
+                vex_stmt_idx=manager.vex_stmt_idx,
             )
             mod = BinaryOp(
                 manager.next_atom(),
@@ -306,9 +333,20 @@ def Binop(expr, manager):
                 ins_addr=manager.ins_addr,
                 vex_block_addr=manager.block_addr,
                 vex_stmt_idx=manager.vex_stmt_idx,
-                bits=bits,
+                bits=op1_size,
             )
-            operands = [mod, div]
+            truncated_mod = Convert(
+                manager.next_atom(),
+                op1_size,
+                chunk_bits,
+                signed,
+                mod,
+                ins_addr=manager.ins_addr,
+                vex_block_addr=manager.block_addr,
+                vex_stmt_idx=manager.vex_stmt_idx,
+            )
+
+            operands = [truncated_mod, truncated_div]
             op_name = "Concat"
             signed = False