diff --git a/CHANGELOG.md b/CHANGELOG.md
index d17227813a5a..f6e61b1c4784 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -11,6 +11,9 @@ For each category, *Added*, *Changed*, *Fixed* add new entries at the top!
 
 ### Fixed
 
+- CFG: Make `have_basepri` an expected cfg
+- Removed unused `proc-macro-error` crate from dependencies
+
 ### Changed
 
 ## [v1.1.4] - 2023-02-26
diff --git a/Cargo.toml b/Cargo.toml
index 68fea4cb2cf2..d764e327e54a 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -21,7 +21,7 @@ name = "rtic"
 
 [dependencies]
 cortex-m = "0.7.0"
-cortex-m-rtic-macros = { path = "macros", version = "1.1.6" }
+cortex-m-rtic-macros = { path = "macros", version = "1.1.7" }
 rtic-monotonic = "1.0.0"
 rtic-core = "1.0.0"
 heapless = "0.7.7"
diff --git a/build.rs b/build.rs
index ff9ebe35e7ff..ac284c4ecfb6 100644
--- a/build.rs
+++ b/build.rs
@@ -7,6 +7,9 @@ fn main() {
         println!("cargo:rustc-cfg=rustc_is_nightly");
     }
 
+    // Make `have_basepri` an expected cfg.
+    println!("cargo::rustc-check-cfg=cfg(have_basepri)");
+
     // These targets all have know support for the BASEPRI register.
     if target.starts_with("thumbv7m")
         | target.starts_with("thumbv7em")
diff --git a/macros/Cargo.toml b/macros/Cargo.toml
index c3f05614856c..6786130b955e 100644
--- a/macros/Cargo.toml
+++ b/macros/Cargo.toml
@@ -12,14 +12,13 @@ license = "MIT OR Apache-2.0"
 name = "cortex-m-rtic-macros"
 readme = "../README.md"
 repository = "https://github.com/rtic-rs/cortex-m-rtic"
-version = "1.1.6"
+version = "1.1.7"
 
 [lib]
 proc-macro = true
 
 [dependencies]
 proc-macro2 = "1"
-proc-macro-error = "1"
 quote = "1"
 syn = "1"
 rtic-syntax = "1.0.3"
diff --git a/src/export.rs b/src/export.rs
index 6f2a1b63c188..71e83411f5da 100644
--- a/src/export.rs
+++ b/src/export.rs
@@ -88,6 +88,7 @@ pub struct Barrier {
 }
 
 impl Barrier {
+    #[allow(clippy::new_without_default)]
     pub const fn new() -> Self {
         Barrier {
             inner: AtomicBool::new(false),
@@ -264,7 +265,7 @@ pub unsafe fn lock<T, R, const M: usize>(
 ///     - we execute the closure in a global critical section (interrupt free)
 ///     - CS entry cost, single write to core register
 ///     - CS exit cost, single write to core register
-///   else
+///   - else
 ///     - The `mask` value is folded to a constant at compile time
 ///     - CS entry, single write of the 32 bit `mask` to the `icer` register
 ///     - CS exit, single write of the 32 bit `mask` to the `iser` register