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This directory contains the FPGA side of the bsg_link.
Hi Paul, I noticed that we don't have the FPGA code for bsg_link -- do you think you can add it? I assume that as we build the HB daughterboard, this will be a component we use. This will also be very useful for external users of the bsg_link module.
The text was updated successfully, but these errors were encountered:
@gaozihou additional info that would be helpful: max speed of clock/data pins achieved on FPGA, and if there are any board-level tricks required for that
basejump_stl/hard/ultrascale_plus/bsg_link/README.md
Line 1 in 321c896
Hi Paul, I noticed that we don't have the FPGA code for bsg_link -- do you think you can add it? I assume that as we build the HB daughterboard, this will be a component we use. This will also be very useful for external users of the bsg_link module.
The text was updated successfully, but these errors were encountered: